1. Field of the Invention
This invention relates to a circuit and method for driving a capacitive load and, more particularly, to a driving circuit and driving method for a capacitive load suitable to drive a load that has a capacitance like an electrode of a dot matrix type display panel such as a plasma display panel and an EL display panel.
2. Description of the Related Art
In recent years, the need for a large-screen display device greater in size than a 40-inch type (102 cm diagonal) has risen as a process of improving a display device. This achievement will be difficult if such a large screen display device is constructed with a CRT (cathode ray tube). The reason is that its volume, weight, operating voltage, etc., becomes very large. Accordingly, a projection type display device and a reflection type display device have come into practical use as such large screen display devices. However, they are fundamentally inferior in display brightness, visual angle, color reproducibility, and depth, and have difficulty in following recent trends to construct a display device in the form of a flat panel and to realize a lightweight display device. In order to answer the marketing needs, demands have been made to develop and commercialize a self-luminous type large-screen plasma display device that has a flat display surface, that is light in weight, that is thin in depth, and that is excellent in visibility, such as the visual angle and color reproducibility. The rapid spread of the device is expected.
The plasma display device is made up of a panel portion (hereinafter designated simply as xe2x80x9cpanelxe2x80x9d or in detail as xe2x80x9cplasma display panelxe2x80x9d) for displaying an image by the use of a luminous discharge phenomenon and a driving circuit portion for driving this panel. According to differences in the discharge type, plasma display devices are classified into DC discharge types and an AC discharge types, and, according to differences in the electrode structure, they are classified into surface discharge types, opposition discharge types, two-electrode types, three-electrode types, etc. Among these types, the DC discharge type display device is constructed such that electrodes are exposed directly to a discharge space and, once an electric discharge occurs, a DC electric current continues running. By contrast, the AC discharge type display device is constructed such that an insulating layer lies between electrodes and a discharge gas, and therefore an electric current is restricted by the electrostatic capacity of the insulating layer, and, after a voltage is applied, the current runs for a short time of about one microsecond like a pulse and stops running. Since the insulating layer serves as a condenser, the AC discharge type display device repeats light emission and displays images by applying a bipolar AC pulse voltage to one of the electrodes or by alternately applying a pulse to both the electrodes.
The DC type display device is at a disadvantage in that, in spite of its simple structure, the electrodes deteriorate so significantly that the display device cannot maintain its long life because the electrodes are exposed directly to a discharge space on the other hand, the AC type display device is a t an advantage in t hat the lifetime thereof is long because the electrodes are covered with the insulating layer.
After all, these days, a method in which a surface discharge type plasma panel is allowed to undergo AC driving while separating a scanning electrode and a sustaining electrode from each other by the use of three kinds of electrodes is chiefly used among various plasma display methods that have been proposed until now. The reason is that, at the present time, this method is excellent in durability, is simple in structure, is relatively easy to aim at high definition/screen enlargement, and, in addition, is capable of easily realizing a luminescence maintaining function, called memory, that enables high-luminance light emission.
In any type, the plasma display panel is made up of two substrates facing each other, i.e., a front transparent substrate and a back substrate, a discharge gas space in which discharge gas, such as Hexe2x80x94Xe or Nexe2x80x94Xe, is filled and display cells are arranged in a matrix form at a gap between the substrates, and various stripe-shaped electrodes arranged perpendicularly to each other on each inner surface of the front transparent substrate and the back substrate. Electrodes on the side of the front transparent substrate and electrodes on the side of the back substrate are arranged to intersect at the position of each display cell.
Next, a description will be provided of a three-electrode surface discharge type panel structure as a representative of a plasma display panel of AC driving.
FIG. 1 is an exploded perspective view that separately shows the structure of a plasma display panel of the three-electrode surface discharge type, FIG. 2 is a cross-sectional view of the panel, FIG. 3 is an enlarged sectional view that shows a part of the panel by further enlarging it, FIG. 4 is a plan view that shows the electrode structure of the panel, and FIG. 5 is a plan view that shows the display cell structure of the panel.
As shown in FIGS. 1 to 5, in a panel 1 of the three-electrode surface discharge type, three kinds of display cells Cr, Cg, and Cb are disposed on the inner surface of a front transparent substrate 2. The display cells Cr, Cg, and Cb serve to produce the colors of red, green, and blue, respectively. The display cells Cr, Cg, and Cb are arranged in the direction of columns. The column of the display cell Cg is disposed next to the column of the display cell Cr, and the column of the display cell Cb is disposed next to the column of the display cell Cg. Thus, the column of the display cell Cr, the column of the display cell Cg, and the column of the display cell Cb are disposed repeatedly in the direction of rows. Further, in the plasma display panel, there are formed a lot of surface discharge electrode pairs that are made by pairs of a plurality of transparent scanning electrodes S1, S2, . . . (hereinafter designated generically as xe2x80x9cscanning electrode Sxe2x80x9d) and a plurality of transparent sustaining electrodes Su1, Su2, . . . (hereinafter designated generically as xe2x80x9csustaining electrode Suxe2x80x9d). The scanning electrode S and the sustaining electrode Su extend in the row wise direction. Each scanning electrode S and each sustaining electrode Su are disposed to pass through the display cells arranged in the row wise direction. The scanning electrode S (S1, S2, . . . ) and the sustaining electrode Su (Su1, Su2, . . . ) are each made of a transparent conductive thin film, such as ITO (Indium Tin Oxide) or SnO2. In order to supply a sufficient electric current to the scanning electrode S and the sustaining electrode Su, a bus electrode B made of, for example, a silver thick film is disposed at one side end of the surface of each of the scanning electrode S and the sustaining electrode Su. The surfaces of the scanning electrode S and the sustaining electrode Su that are each provided with the bus electrode B are covered with a transparent dielectric layer 3. An MgO protective layer 4 to protect the dielectric layer 3 from ion bombardment during a discharge is further placed on the transparent dielectric layer 3.
On the inner surface of the back substrate 6, stripe-shaped partitions 7 are disposed between columns that are constructed of the display cells. The partitions 7 define a stripe-shaped discharge gas space that divides the columns of the display cells and extends in the column wise direction. A plurality of data electrodes (column electrodes) D1, D2 . . . (hereinafter designated generically as xe2x80x9cdata electrode Dxe2x80x9d) are further disposed on the plasma display panel. The data electrode D extends in the column wise direction. Each data electrode D is disposed to pass through each of the columns of the display cells Cr, Cg, and Cb arranged in the column wise direction. A dielectric layer 8 is formed on the data electrodes D that are each made of, for example, a silver film and are connected in the column wise direction per column of each of the display cells Cr, Cg, and Cb in the discharge gas space. Three kinds of fluorescent materials 9r, 9g, and 9b by which ultraviolet rays generated by a discharge in the discharge gas are converted into visible rays of R, G, and B colors are placed in the form of a stripe on a sectionally channel-shaped groove surface of the discharge gas space that is defined by the dielectric layer 8, the partition 7, and the next partition 7.
Thus, the plasma display panel 1 of the three-electrode surface discharge type is constructed such that, as shown in FIG. 3, the surface discharge electrode pair consisting of the pair of the scanning electrode S and the sustaining electrode Su and the data electrode D intersect with each other at the part of each display cell Cr, Cg, and Cb, and the repetitive unit of the display cells Cr, Cg, and Cb of the R, G, and B colors that are arranged in the row wise direction with the partition 7 therebetween is represented as one pixel. The display cells Cr (Cg, Cb) having the same color are arranged in the column wise direction. For example, in a 42-inch type (106 cm diagonal) panel 1 used as a large-screen three-electrode surface discharge type panel, 480 scanning electrodes S that extend in the row wise direction are disposed, 480 sustaining electrodes Su that similarly extend in the row wise direction are disposed, and 2559 data electrodes D that extend in the column wise direction are disposed. The number of pixels in the column wise direction of this panel is 480, the number of pixels in the row wise direction is 853, and the pitch of each pixel is about 1 mm both in the row wise direction and in the column wise direction.
Next, a description will be provided of a driving circuit portion for driving the plasma display panel 1.
FIG. 6 is a block diagram that shows a circuit structure of an AC drive plasma display panel of the three-electrode surface discharge type and a driving circuit thereof. The driving circuit portion applies a voltage pulse between a data electrode D and a scanning electrode S and causes a write discharge so as to form wall charges on the scanning electrodes S of the display cells Cr, Cg, and Cb. As a result, the display cell having the wall charge on its scanning electrode generates a sustaining discharge when a sustaining discharge operation, described later, is carried out. Voltage pulses for generating a sustaining discharge in such an arbitrary display cell are called lighting indicative data, and the operation of forming a wall charge on the scanning electrode S of the arbitrary display cell and writing the lighting indicative data is called writing operation. The driving circuit portion is designed to carry out display driving by a combination with a so-called sustaining discharge operation (see FIGS. 9(a) and 9(b)) for alternately applying a sustaining pulse between the scanning electrode S and the sustaining electrode Su and allowing only the display cells Cr, Cg, and Cb on which wall charges are formed to sustain a luminous discharge after the writing operation is completed.
In order to achieve this two-stage driving (scanning/sustaining separation driving), the driving circuit portion is made up of a drive timing control circuit 10, a data electrode driving circuit 11, an indicative data control circuit 12, a data electrode driving element 13, a scanning electrode driving circuit 14, a scanning electrode driving element 15, a sustaining electrode driving circuit 16, and a power supply for driving 17, as shown in FIG. 6.
The function of each constituent of the driving circuit portion will be described in detail. As shown in FIG. 6, the drive timing control circuit 10 first generates various timing pulses necessary to drive the panel 1 on the basis of a vertical synchronizing signal that is an input signal transmitted from the indicative data control circuit 12, and then controls a sequence to control and drive the entire panel. It should be noted that, for gradation display, one field period is constructed by a plurality of periods (subfield) different in the number of pulses that are applied for a sustaining (operating) period in the plasma display device, and the timing of the subfield at this time is also controlled by the drive timing control circuit 10.
The data electrode driving circuit 11 generates a data pulse train on the basis of a clock signal supplied from the drive timing control circuit 10, and supplies it to the data electrode driving element 13.
The indicative data control circuit 12 that includes a frame memory processes input indicative data that have given, thereafter generates write data (lighting indicative data) about all the display cells Cr, Cg, and Cb per subfield, and makes the serial transfer of the generated write data to the data electrode driving element 13 at high speed.
FIG. 7 shows various driving waveforms in one subfield. As shown in FIG. 6 and FIG. 7, the data electrode driving element 13 is made up of a shift register for applying a serial-parallel conversion to the write data supplied from the indicative data control circuit 12 and a high-pressure resistance switching element group of a C-MOS structure connected to the data electrodes D by one-to-one. When it receives an enabling signal indicating the delimitation of the write data from the drive timing control circuit 10, the data electrode driving element 13 simultaneously and in one lump drives the data electrodes D on the basis of the write data about one row of the display cells Cr, Cg, and Cb where inputting has been completed. In other words, data pulses Rd1, Rd2, . . . Rdn (see (e) of FIG. 7) supplied from the data electrode driving circuit 11 are simultaneously applied to all the data electrodes D that pass through the display cells Cr, Cg, and Cb having the command of xe2x80x9cLightingxe2x80x9d.
The drive timing control circuit 10 periodically outputs various ON/OFF signals every one subfield. when the supply of these ON/OFF signals is input, the scanning electrode driving circuit 14 sequentially generates a preliminary discharge pulse Pp, a preliminary discharge deletion pulse Pd, bas e pulses Pb1, Pb2, . . . Pbn, and a sustaining pulse train Pm, according to the kind of the signal, and supplies them to the scanning electrode driving element 15 (see (b), (c), and (d) of FIG. 7).
When various batch synchronizing signals supplied from the drive timing control circuit 10 are received, the scanning electrode driving element 15 simultaneously applies the preliminary discharge pulse Pp, the preliminary discharge deletion pulse Pd, the sustaining pulse train Pm that are sequentially supplied from the scanning electrode driving circuit 14 to all the scanning electrodes S according to the kind of the signal, and drives the scanning electrodes S in the lump. At the same time, during a writing period for the lighting indicative data, the scanning electrode driving element 15 sequentially and selectively scans the scanning electrodes S while responding to a horizontal synchronizing signal (shift pulse) supplied from the drive timing control circuit 10, and applies scanning pulses (row selection pulses) Ps1, Ps2, . . . Psn to selected scanning electrodes Sn (see (b), (c), and (d) of FIG. 7).
On receiving the supply of various ON/OFF synchronizing signals, which take a round every one subfield, from the drive timing control circuit 10, the sustaining electrode driving circuit 16 sequentially generates a preliminary discharge pulse Qp, a sustaining pulse Qm, a sustaining deletion pulse Qd according to the kind of the signal, and simultaneously applies the generated pulses to all the sustaining electrodes Su so as to perform the batch driving of the sustaining electrodes Su (see (a) of FIG. 7).
The power supply 17 supplies necessary power to the data electrode driving circuit 11, the scanning electrode driving circuit 14, and the sustaining electrode driving circuit 16.
Next, a description will be provided of a method of performing gradation display by the use of the above-mentioned plasma display panel. Unlike other devices, in the plasma display panel, it is difficult to perform the gradation display of brightness according to a change in an applied voltage because the relationship between the applied voltage and the brightness is not linear. Therefore, in general, the gradation display is performed by controlling the frequency of light emission. Especially in the gradation display of brightness, a subfield method, described later, is used.
FIG. 8 shows a driving sequence under the subfield method, where the horizontal axis indicates time, and the vertical axis indicates scanning electrodes S1, S2, . . . Sn. One image is sent during one field. The time of one field depends on each individual computer and a broadcasting system, and is often set within the range of roughly {fraction (1/50)} to {fraction (1/75)} seconds. In the gradation image display of the plasma display panel, one field is divided into k subfields as shown in the figure. In FIG. 8, for example, one field is divided into six subfields of SF1, SF2, . . . and SF6.
As shown in FIG. 8, each of the subfields SF1, SF2, . . . SF6 is made up of a write period for writing lighting indicative data on the display cells Cr, Cg, and Cb by a scanning pulse and a data pulse and a sustaining discharge period for lighting and displaying only the display cells Cr, Cg, and Cb on which the lighting indicative data has been written. As shown in FIG. 8, during the write period, an erasing discharge for erasing the lighting indicative data written on a previous subfield or a compulsory preliminary discharge is carried out, and thereafter a voltage pulse is applied to the data electrodes D and the scanning electrodes S so as to generate a write discharge. Wall charges are formed on the scanning electrodes S of the display cells Cr, Cg, and Cb on which the lighting indicative data is written by the discharge.
During the sustaining discharge period following the write period, only the display cells on which the lighting indicative data has been written are lit and displayed by applying an AC sustaining pulse between the scanning electrode S and the sustaining electrode Su.
Assuming that xe2x80x9cnxe2x80x9d is a subfield number, the subfield with the lowest brightness is defined as xe2x80x9c1xe2x80x9d, and the subfield with the highest brightness is defined as xe2x80x9ckxe2x80x9d. L1 is the brightness (number of times of light emission) of the subfield lowest in brightness, xe2x80x9canxe2x80x9d is a variable that takes the value of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d, and, in the n-th subfield (xe2x80x9cthxe2x80x9d is a suffix forming an ordinal number), xe2x80x9c1xe2x80x9d indicates a case where the display cells Cr, Cg, and Cb are lit, and xe2x80x9c0xe2x80x9d indicates a case where those cells are not lit. Brightness can be controlled while selecting the lighting/non-lighting of the display cells Cr, Cg, and Cb per subfield by allowing the luminous brightness to differ between subfields in this way.
As a result, if the luminous brightness of each of the display cells Cr, Cg, and Cb is represented as I, the luminous brightness I is controlled according to Equation (1) in which the number of times of light emission of a sustaining discharge of each of the display cells Cr, Cg, and Cb in each subfield is weighted by 2n.                     I        =                              ∑                          n              =              1                        k                    ⁢                                    (                                                L                  1                                xc3x97                                  2                                      n                    -                    1                                                              )                        xc3x97                          a              n                                                          (        1        )            
Since the repetitive unit of the display cells Cr, Cg, and Cb of the R, G, and B colors is defined as one pixel when images are displayed in colors, the gradation of 2k=26=64 stages can be expressed by each color if k=6. Concerning a pigment, 643=262144 colors including black can be displayed. If k=1, one field is equal to one subfield, and two-gradation (ON or OFF) display can be performed about each color. Concerning the number of colors, 23=8 colors including black can be displayed.
Next, various driving waveforms in one subfield will be described with reference to FIG. 7. A preliminary discharge pulse (positive pulse) Pp, a preliminary discharge deletion pulse Pd, and a sustaining pulse Pm, which are common to scanning electrodes S (S1, S2, . . . , Sn), are applied to these scanning electrodes, and, in writing and scanning, scanning pulses Ps1, Ps2, . . . , Psn are sequentially applied to the scanning electrodes S1, S2, . . . , Sn, respectively, with independent timing. That is, the scanning pulse Ps1 is first applied to the scanning electrode S1, the scanning pulse Ps2 is then applied to the scanning electrode S2, and thereafter the scanning pulse Ps3 is applied to the scanning electrode S3. When one scanning electrode is selected, scanning base pulses Pb1, Pb2, . . . , Pbn are applied to the remaining scanning electrodes that have not been selected.
As shown in (a) of the figure, during a preliminary discharge, a preliminary discharge pulse Qp (negative pulse) is applied to the sustaining electrode Su synchronously with the preliminary discharge pulse Pp (positive pulse) to be applied to the scanning electrodes S1, S2, . . . , Sn. During a sustaining discharge, a sustaining pulse Qm is applied thereto with timing that is alternated with the timing with which a sustaining pulse Pm is applied to the scanning electrodes S1, S2, . . . , Sn. When the sustaining discharge is completed, a sustaining deletion pulse Qd is applied thereto. As shown in (e) of the figure, if there are lighting-indicative data to be written in the writing, data pulses Rd1, Rd2, . . . , Rdn are applied to the data electrode D synchronously with the scanning pulses Ps1, Ps2, . . . , Psn.
Next, the subfield operation of a three-electrode surface discharge type plasma display device will be described with reference to FIG. 9. FIG. 9 shows the subfield operation of the three-electrode surface discharge type plasma display device.
(1) Sustaining discharge deletion ((c) of FIG. 9)
First, the sustaining electrode driving circuit 16 applies the sustaining deletion pulse Qd to the sustaining electrode Su with timing directed by the drive timing control circuit 10, and deletes the discharge of the display cells Cr, Cg, and Cb that have emitted light in an immediately previous subfield. As a result, an extra wall charge that causes noise is deleted.
(2) Preliminary discharge ((d) of FIG. 9)
Thereafter, the scanning electrode driving element 15 and the sustaining electrode driving circuit 16 alternately apply positive and negative preliminary discharge pulses Pp and Qp to all the scanning electrodes S and the sustaining electrodes Su with timing simultaneously directed by the drive timing control circuit 10 so as to generate a voltage between both the electrodes, and thereby cause all the display cells Cr, Cg, and Cb to compulsorily discharge once.
(3) Preliminary discharge deletion ((e) of FIG. 9)
Immediately thereafter, the scanning electrode driving element 15 applies a preliminary discharge deletion pulse Pd to all the scanning electrodes S with the timing directed by the drive timing control circuit 10, and deletes the preliminary discharge. As a result, active particles are injected into a discharge space, and a write discharge by scanning pulses Ps1, Ps2, . . . , Psn to be subsequently applied is liable to easily occur.
(4) Write discharge ((f) of FIG. 9)
After the preliminary discharge is deleted, the data electrode driving element 13 and the scanning electrode driving element 15 apply scanning pulses Ps1, Ps2, . . . , Psn, and data pulses Rd1, Rd2, . . . , Rdn between selected scanning electrodes S1, S2, . . . , Sn, and data electrodes D1, D2, . . . , Dn with timing, i.e., shift timing simultaneously directed by the drive timing control circuit 10. As a result, the display cells Cr, Cg, and Cb on which the lighting indicative data is to be written undergo a selective discharge, and wall charges are formed on the scanning electrodes S of the display cells Cr, Cg, and Cb subjected to the selective discharge. Thus, the lighting indicative data is written in the form of the wall charges formed thereon. If only the scanning pulses Ps1, Ps2, . . . , Psn or only the data pulses Rd1, Rd2, . . . , Rdn are applied, the write discharge does not occur, and neither does the subsequent sustaining discharge occur.
(5) Sustaining discharge ((a) and (b) of FIG. 9)
After the completion of the write discharge, the scanning electrode driving element 15 and the sustaining electrode driving circuit 16 alternately apply sustaining pulses Pm and Qm to the scanning electrode S and the sustaining electrode Su with application timing alternately supplied by the drive timing control circuit 1, and cause only the wall-charge forming display cells Cr, Cg, and Cb to maintain the sustaining discharge (luminous discharge) between the sustaining electrode Su and the scanning electrode S that adjoin each other. One subfield operation is completed through these procedures. When the one subfield operation is completed, the stage proceeds to a subsequent subfield operation, and the above-mentioned cycle operation is repeated. The luminous brightness in each subfield is controlled by the number of times of repetition of the sustaining discharge.
In general, a dot matrix type display panel forms a lot of row electrodes and column electrodes, and forms display pixels or display cells in a crossing area of them. Therefore, the sum total of the electrostatic capacity that exists between facing electrodes or parallel electrodes reaches a large amount. For this reason, when the dot matrix type display panel is driven, a necessary operating voltage cannot be applied to each display element if the charge of the electrostatic capacity is not completed. An electric power part used only to charge the device with the electrostatic capacity is different from the electric power actually consumed. If the power part can be recovered in an appropriate way, it is reusable. Therefore, it is generally called reactive power.
Since a luminous discharge phenomenon is used especially in the plasma display panel, a driving voltage to be applied is high, and reactive power proportionately increases. Further, in AC driving, electric power that accompanies the movement of a wall charge remaining on the wall surface of a dielectric also corresponds to reusable reactive power that is the same in quality as the charging electric power toward the electrostatic capacity, and therefore the reactive power increases even more.
In order to overcome this disadvantage, an attempt has been made to reduce power consumption in such a way as to regain charging electric power with which a capacitive load is charged and to reuse it (electrically revive it). For example, Japanese Unexamined Patent Publication No. 132997 of 1986 (hereinafter designated as xe2x80x9cfirst prior artxe2x80x9d) provides a means for regenerating a charge stored in an electrostatic capacity into an original power supply and reusing it. Further, Japanese Unexamined Patent Publication No. 11019 of 1998 (hereinafter designated as xe2x80x9csecond prior artxe2x80x9d) discloses a means for regenerating a charge stored in an electrostatic capacity into an exclusive regenerating condenser and reusing it.
First, a description will be provided of the basic circuit of the first prior art and the operation of the circuit. FIG. 10 is a circuit diagram that shows the basic structure of a sustaining pulse generation circuit provided with an electric power regenerating function according to the first prior art, and FIG. 11 is a timing chart for describing the operation of the circuit. The sustaining pulse generation circuit is to generate a sustaining pulse and supply it to a sustaining electrode or to a scanning electrode, and, as shown in FIG. 10, the circuit is made up of high-voltage switches SW11, SW12, SW13, SW14, diodes DI11, DI12, DI13, DI14, a coil L11 for electric-power recovery, and an external capacity C12 including a stray capacity and the like in the circuit. In the figure, C11 designates a condenser of a DC power source output, C13 designates a capacitive load that includes dissimilar/similar electrodes (various panel electrodes) of the plasma display panel, TP1 designates an output terminal of the sustaining pulse generation circuit, and TP2 designates a terminal for connecting a DC power source that supplies a voltage VS.
Next, referring to FIG. 10 and FIG. 11, a description will be provided of the operation of the sustaining pulse generation circuit constructed as above. First, at time T11, the switch SW14 is opened ((d) of FIG. 11), and the switch SW11 is closed ((a) of FIG. 11) in order to feed a sustaining pulse voltage, and the external capacity C12 and the capacitive load C13 are charged through the coil L11. At time T12 when the voltage of the terminal TP1 exceeds the voltage VS of the connecting terminal TP2 of the DC power source, the diode DI13 conducts a current, and the voltage of the terminal TP1 is clamped at the voltage VS of the terminal TP2 ((e) of the figure). Thereafter, when the switch SW11 is opened ((a) of the figure) in accurate synchronization with time T12, the energy saved in the coil L11 is regenerated into the condenser C11 connected to the terminal TP2 through the coil L11, the diode DI13, the condenser C11, and the diode DI12.
Thereafter, at time T12 when the voltage of the terminal TP1 exceeds the voltage of the terminal TP2, the switch SW13 is closed ((c) of the figure), and the terminal TP1 is connected to the DC power source so as to fix the voltage of the terminal TP1 at the sustaining pulse voltage VS.
Thereafter, at time T13, the switch SW13 is opened ((c) of the figure), and, at the same time, the switch SW12 is closed ((b) of the figure) so as to remove the sustaining pulse voltage VS. Thereby, the voltage of the terminal TP1 drops to 0 voltage through the coil L11. At time T14 when the voltage of the terminal TP1 becomes less than 0 voltage, the diode DI14 conducts a current, and the terminal TP1 is clamped at 0 voltage ((e) of the figure). Thereafter, when the switch SW12 is opened accurately synchronizing with time T14 ((b) of the figure), the energy saved in the coil L11 is regenerated into the condenser C11 connected to the terminal TP2 through the coil L11, the diode DI11, the condenser C11, and the diode DI14.
Thereafter, at time T14 when the voltage of the terminal TP1 is under 0 voltage, the switch SW14 is closed ((d) of the figure), and the terminal TP1 is connected to an earth terminal so as to fix the voltage of the terminal TP1 at 0 voltage.
Next, a description will be provided of the basic circuit of the second prior art and the operation of the circuit. FIG. 12 is a circuit diagram that shows the basic structure of the sustaining pulse generation circuit provided with an electric-power regenerating function according to the second prior art, and FIG. 13 shows waveforms of an electric current by an output voltage and an electromotive force of a coil for explaining the operation of this circuit.
As shown in FIG. 12, the sustaining pulse generation circuit roughly comprises a charge regenerating portion 19 that includes a condenser C21 for regenerating energy, a coil L21, and switching means 18 connected in series, a first clamping means 21, provided with a switch SW21, for clamping a panel electrode 20 (for example, a sustaining electrode or a scanning electrode) that constructs a capacitive load Cp at a power-supply voltage Vcc, a second clamping means 22, provided with a switch SW22, for clamping the panel electrode 20 at an earth potential, and first and second driving means 23, 24 for driving the first or second clamping means 21, 22 by detecting that an electric current through the coil L21 has flowed backward.
As shown in FIG. 12, the switching means 18 is constructed such that a combination of the switch SW23 and the diode DI21 that are connected in series with each other and a combination of the switch SW24 and the diode DI22 opposite in direction to the diode DI21 that are connected in series with each other are connected in parallel with each other. Accordingly, when the electric current flowing through the coil L21 reaches zero (0), the switching means 18 is turned xe2x80x9cOFFxe2x80x9d. In the sustaining pulse generation circuit, the sustaining pulse generation circuit connected to the scanning electrode and the sustaining pulse generation circuit connected to the sustaining electrode are disposed as a pair.
Next, referring to FIG. 12 and FIG. 13, a description will be provided of the operation of the sustaining pulse generation circuit constructed as above. On the assumption that the terminal voltage Vss of the condenser C21 for regenerating energy is Vcc/2 (half the power-supply voltage), the voltage Vp between the terminals of the capacitive load Cp is 0, the switches SW21 and SW23 are each in an open state, and the switches SW22 and SW24 are each in a closed state (i.e., State 0), the stage proceeds from State 0 to State 1.
(1) State 1
First, the switch SW21 is closed, the switch SW22 is opened, and the switch SW24 is opened. When the switch SW21 is closed, a serial resonance circuit is formed with the coil L21 and the capacitive load Cp. At this time, the terminal voltage Vss of the condenser C21 has a forcing voltage of Vcc/2. Thereafter, the terminal-and-terminal voltage Vp of the capacitive load Cp rises to the power-supply voltage Vcc. At this time, an electric current IL by the electromotive force of the coil is 0, and the diode DI21 reaches a reverse-bias state.
(2) State 2
The switch SW23 is closed, and the terminal-and-terminal voltage Vp of the capacitive load Cp is clamped at the power-supply voltage Vcc, so that a discharge current path is brought to all the display cells that are to be turned xe2x80x9cONxe2x80x9d.
(3) State 3
The switch SW22 is closed, the switch SW21 is opened, and the switch SW23 is opened. When the switch SW22 is closed, a serial resonance circuit is again formed with the coil L21 and the capacitive load Cp, and, at this time, the terminal voltage Vss of the condenser C21 has a forcing voltage of Vcc/2. Thereafter, the terminal-and-terminal voltage Vp of the capacitive load Cp falls to the earth potential. At this time, the electric current IL by the electromotive force of the coil is 0, and the diode DI22 reaches a reverse-bias state.
(4) State 4
The switch SW24 is closed, and the terminal-and-terminal voltage Vp of the capacitive load Cp is clamped at the earth potential. At this time, another sustaining pulse generation circuit that is paired with this sustaining pulse generation circuit drives the panel electrode, which is situated on the opposite side and is a constituent element of the capacitive load Cp, to the power-supply voltage Vcc. If there is a display cell to be turned xe2x80x9cONxe2x80x9d, a discharge current flows through the switch SW24.
Both the first prior art and the second prior art intend to reduce the reactive power in such a way as to regenerate the charging/discharging power of the electrostatic capacity and reuse it as described above.
However, the first prior art has problems in that, the sustaining pulse generation circuit has four switches SW11, SW12, SW13 and SW14, therefore the circuit structure of the sustaining pulse generation circuit increase in complexity, and in order to efficiently regenerate electric power, the opening/closing of each switch must be accurately controlled according to timing with which the voltage of the capacitive load is clamped at the power-supply voltage and at the earth potential. Further, the second prior art has a problem in that the switches used to clamp the voltages must be opened and closed with accurate timing. If the timing is inaccurate, a large gas discharge current also flows through a driving circuit, such as the sustaining pulse generation circuit, and, for this reason, a power loss in the driving circuit increases, and the regenerating efficiency of the charging/discharging power greatly declines, and, in the worst case, there is fear that the diodes and the switches will be burnt out.
However, in the plasma display panel, the rise time and the fall time of a sustaining pulse are each about 0.2 to 0.5 xcexcs (microseconds), and therefore the driving circuit is required to work at an extremely high speed. Preferably, the operational delay time is below 0.1 xcexcs, for example. However, in the present circumstances, there is no switching device of the high-power type/high-pressure resistance type that has an operational speed high enough to perform an accurate ON-operation only during the rise time or only during the fall time. Additionally, if such a switching device is developed, it will require enormous cost.
Accordingly, if a circuit having a good timing characteristic is constructed by the use of a cheap switching device having an inferior characteristic, the resulting circuit will have an extremely complex circuit structure, and, after all, become expensive. This circuit is inconvenient.
Additionally, the gas discharge current flowing through the driving circuit is not constant, and the number of pixels that emit light per subfield changes according to input indicative data. An equivalent electrostatic capacity also changes according to a change in this display percentage, and, in addition, the resonance frequency of the resonance circuit with the coil changes. Therefore, it becomes increasingly difficult to control various switches so that the opening/closing timing of the switches exactly coincides with each other.
Further, since a high-speed transient occurs in voltage clamping, unnecessary electromagnetic-wave radiation is large.
It is an object of the present invention to provide a circuit and method for driving a capacitive load, that is low cost, and is capable of regenerating reactive power practically sufficiently although its circuit structure is simple, and that is capable of reducing unnecessary electromagnetic-wave radiation.
A driving circuit for a capacitive load, which supplies a pulse to the capacitive load that is an electrode of a capacitive display panel according to the present invention comprises a coil connected in series directly or indirectly to the capacitive load and making up a serial resonance circuit together with the capacitive load; a first switch for applying a DC power source voltage output from a DC power source to the serial resonance circuit and causing first resonance to begin by closing the first switch; a first clamping circuit for stopping the first resonance by clamping a voltage of the capacitive load at the DC power source voltage at time at which the voltage of the capacitive load begins to exceed the DC power source voltage after the first resonance starts; a first flywheel current control circuit for bringing a current flowing through the coil into a first flywheel operational state and sustaining it when the first resonance stops; a first electric-current regenerating circuit for regenerating the current in the first flywheel operational state to the DC power source; a second switch for causing the serial resonance circuit to begin second resonance, with a charging voltage of the capacitive load as a source, by closing the second switch; a second clamping circuit for clamping the voltage of the capacitive load at earth potential and stopping the second resonance at the time at which the voltage of the capacitive load begins to fall below the earth potential after the second resonance begins; a second flywheel current control circuit for bringing the current flowing through the coil into a second flywheel operational state and sustaining it when the second resonance stops; and a second electric-current regenerating circuit for regenerating the current of the second flywheel operational state to the DC power source.
The first electric-current regenerating circuit can regenerate a part of the current in the first or second flywheel operational state to the DC power source in accordance with input timing of a regenerating pulse, and thereafter regenerate a remainder of the current that continues the first or second flywheel operation to the DC power source.
Further, the first electric-current regenerating circuit can include a third switch, and regenerate the current in the first flywheel operational state to the DC power source when the third switch is closed.
Further, the second electric-current regenerating circuit can include a fourth switch, and regenerate the current in the second flywheel operational state to the DC power source when the fourth switch is closed.
The driving circuit of the capacitive load further comprises a load capacity one end of which is connected between the coil and the capacitive load and the other end is connected to the earth potential.
Further, the first clamping circuit includes a first diode connected so that a direction from the coil to the DC power source is a forward direction between the DC power source and a wiring line connecting the coil and the capacitive load, and the second clamping circuit includes a second diode connected so that the direction from an earth terminal to the coil is a forward direction between the wiring line and the earth terminal.
The first flywheel current control circuit is a closed loop made up of a coil, a first diode, and a first switch in the closed state that are connected in this order and in series, the first diode is connected so that the direction of this order is a forward direction, and a control circuit that control the operations of the first and second switches, and the second flywheel current control circuit is a closed loop made up of the coil, a second switch in the closed state and a second diode that are connected in this order and in series, a second diode connected so that a direction of this order is a forward direction, and a control circuit that control the operations of the first and second switches, and the currents in the first and second flywheel operational states flow through the coil in the opposite direction to each other.
The first electric-current regenerating circuit made up of a third diode connected in parallel with the second switch in the open state, a coil, and a first diode that are connected in this order and in series, the third and first diodes connected so that the direction of this order is a forward direction, is interposed between the DC power source and an earth terminal, and the second electric-current regenerating circuit made up of a second diode, a coil, and a fourth diode connected in parallel with the first switch in the open state that are connected in this order and in series, the second and fourth diodes connected so that the direction of this order is a forward direction, is interposed between the DC power source and an earth terminal, and, when the first switch is opened in the case of the second switch is opened, the first electric-current regenerating circuit reaches a current regenerating state, whereas when the second switch is opened in the case of the first switch is opened, the second electric-current regenerating circuit reaches a current regenerating state.
A driving circuit for a capacitive load, which supplies a pulse to the capacitive load that is an electrode of a capacitive display panel according to the present invention comprises: a coil connected directly or indirectly to the capacitive load and making up a serial resonance circuit together with the capacitive load; a first diode connected so that the direction from the coil to the DC power source is a forward direction between one end of the coil on a side of the capacitive load and the DC power source; a second diode connected so that the direction from an earth terminal to the coil is a forward direction between the end of the coil and the earth terminal; a third diode connected so that the direction from the coil to the DC power source is a forward direction between the other end of the coil and the DC power source; a first switch connected in parallel with the third diode; a fourth diode connected so that the direction from the earth terminal to the coil is a forward direction between the other end of the coil and an earth terminal; a second switch connected in parallel with the fourth diode; and a control circuit that control the operations of the first and second switches.
A parallel connection part of the third diode and the first switch and a parallel connection part of the fourth diode and the second switch can be each constructed by a MOSFET including a parasitic diode.
Further, in the driving circuit of the capacitive load, the DC power source voltage is at a lower side than the earth potential, and, instead of the first clamping circuit, a third clamping circuit is provided for clamping the voltage of the capacitive load at the DC power source voltage when the voltage of the capacitive load begins to fall below the DC power source voltage and stopping the first resonance after the first resonance begins, and, instead of the second clamping circuit, a fourth clamping circuit is provided for clamping the voltage of the capacitive load at the earth potential and stopping the second resonance when the voltage of the capacitive load begins to exceed the earth potential and stopping the second resonance after the second resonance begins.
A driving circuit of a capacitive load has two driving circuits, and the two driving circuits are disposed at both sides of the capacitive load, respectively.
A driving method for supplying a pulse train to a capacitive load that is an electrode of a capacitive display panel by the use of the aforementioned driving circuit for the capacitive load includes the steps of, at first time point, closing the first switch and applying the DC power source voltage to the serial resonance circuit so as to begin the first resonance; at second time point at which the voltage of the capacitive load begins to exceed the DC power source voltage after the first resonance begins, clamping a charging voltage of the capacitive load at the DC power source voltage so as to stop the first resonance, and, at this time, sustaining the current flowing through the coil in a first flywheel operational state; at the third time point, opening the first switch and regenerating the current in the first flywheel operational state to the DC power source; at fourth time point, closing the second switch and applying the charging voltage of the capacitive load to the serial resonance circuit so as to begin the second resonance; at fifth time point at which the voltage of the capacitive load begins to fall below the earth potential after the second resonance begins, clamping the voltage of the capacitive load at the earth potential so as to stop the second resonance and, at this time, sustaining the current flowing through the coil in a second flywheel operational state; and at the sixth time point, opening the second switch and regenerating the current in the second flywheel operational state to the DC power source, and supplying a pulse train to the capacitive load by repeating a series of operations from the first time point to the sixth time point.
The regenerating to the DC power source of the current in the first flywheel operational state by opening the first switch at the third time point can be carried out such that the first switch is caused to be in an open state during a predetermined time, and, during this time, a part of the current in the first flywheel operational state is regenerated to the DC power source, and thereafter the first switch is again opened, and the remaining current that continues the first flywheel operation is regenerated to the DC power source.
Further, the regenerating to the DC power source of the current in the second flywheel operational state by opening the second switch at the sixth time point can be carried out such that the second switch is caused to be in an open state during a predetermined time, and, during this time, a part of the current in the second flywheel operational state is regenerated to the DC power source, and thereafter the second switch is again opened, and the remaining current that continues the second flywheel operation is regenerated to the DC power source.
A time point at which the first switch is brought into an open state can be controlled according to a load capacity of the capacitive load.
Further, a time point at which the second switch is brought into an open state can be controlled according to a load capacity of the capacitive load.
Further, a time width of the open state of the first switch can be controlled according to a load capacity of the capacitive load.
Further, a time width of the open state of the second switch can be controlled according to a load capacity of the capacitive load.
The first current regenerating circuit includes a third switch, and, at the third time point, the regenerating to the DC power source of the current in the first flywheel operational state by opening the first switch is carried out such that, at the third time point, the third switch is closed, and the current in the first flywheel operational state is regenerated to the DC power source.
The second current regenerating circuit includes a fourth switch, and, at the sixth time point, the regenerating to the DC power source of the current in the second flywheel operational state by opening the second switch is carried out such that, at the sixth time point, the fourth switch is closed, and the current in the second flywheel operational state is regenerated to the DC power source.
The driving circuit of the capacitive load further includes a load capacity one end of which is connected between the coil and the capacitive load, and the other end is connected to the earth potential, and the current is passed from the load capacity to the capacitive load between the second time point and the third time point and between the fifth time point and the sixth time point.
When the DC power source voltage is at a lower side than the earth potential, a charging voltage of the capacitive load is clamped at a DC power source voltage so as to stop the first resonance at the second time point at which the voltage of the capacitive load begins to fall below the DC power source voltage and the current flowing through the coil at this time point is sustained in the first flywheel operational state, and, at the fifth time point at which the voltage of the capacitive load begins to exceed the earth potential, the voltage of the capacitive load is clamped at the earth potential so as to stop the second resonance, and the current flowing through the coil at this time point is sustained in the second flywheel operational state.
According to the present invention, the reactive power, which is used only to charge/discharge the capacitive load, of the electric power supplied to the capacitive load is regenerated to the power source after it is sustained in the form of the current energy for the coil as described above, and therefore power consumption can be reduced.
Further, according to the present invention, two clamping switches difficult in timing control that have been conventionally used are removed, and the number of components is reduced, and, instead, a function for regenerating the flywheel current to the power source is provided. Therefore, electric-power regenerating efficiency sufficient for practical use can be obtained in spite of the fact that the circuit structure is simple and cheap.
Further, since a serial resonance circuit is formed with a coil and a capacitive load, a moderately transient pulse t rain can be obtained. If it is moderately transient, high-frequency components of a pulse shape decrease, and therefore unnecessary electromagnetic-wave radiation caused by the capacitive load can be reduced.
Additionally, when the time of xc2xc of the natural oscillation cycle of the serial resonance circuit made up of the coil and the capacitive load elapses after the start of charging or discharging, automatic clamping is carried out without using any switches. Accordingly, it can be easily followed even if the clamping time of voltage changes at random interrelatedly with a random change in the value of the capacitive load. Accordingly, it is possible to avoid conventional difficulties in control by which the timing of switches must follow the clamping time that changes at random.